a stage(0) question
Posted: Thu Aug 22, 2019 9:31 am
Hi all. Excuse my recent absense, I'm constantly on FS64 these days (marvellous) and I know much of my recent stuff would screw up on 32 bit. Anyway ...
Back in February I started a topic about skipping over code whenever there was 'no change', i.e. nothing new to calculate - for example when a note or chord is sustained. Which in cpu terms is most of the time.
http://www.dsprobotics.com/support/view ... ged#p47190
The inhibitor I devised back then (with a lot of help!) ended up something like this (posted previously)...
It checks if any of the 4 notes in a SSE group have changed, and if they haven't it skips the code. So any new note runs the code just once.
I was revisiting it all yesterday (I'd screwed something else up, as you do ..) and it suddenly occurred to me -
In this particular case does the addition merely replicate what you get anyway by simply using stage(0)?
In effect :
Doh
Back in February I started a topic about skipping over code whenever there was 'no change', i.e. nothing new to calculate - for example when a note or chord is sustained. Which in cpu terms is most of the time.
http://www.dsprobotics.com/support/view ... ged#p47190
The inhibitor I devised back then (with a lot of help!) ended up something like this (posted previously)...
It checks if any of the 4 notes in a SSE group have changed, and if they haven't it skips the code. So any new note runs the code just once.
I was revisiting it all yesterday (I'd screwed something else up, as you do ..) and it suddenly occurred to me -
In this particular case does the addition merely replicate what you get anyway by simply using stage(0)?
In effect :
- Code: Select all
stage0;
< some assembler code >
stage2;
Doh