Bitwise strangeness
Posted: Wed Feb 17, 2016 12:23 pm
At the moment, I really don't understand these 2 things in FlowStone DSP Code (let isLoop = 1).
First uncertainty
in fact:
0001 (isLoop > 0) AND 0101 (5) is 0001 (1)
0001 (isLoop > 0) AND 0110 (6) is 0000 (0)
Second uncertainty
The code looks "the same" (the second one it is just without the brackets), but it outputs very different.
In fact this:
output 1000 instead of 51 And if I change isLoop to 0, it output 1051
Can you help me to got this? Thanks!
First uncertainty
- Code: Select all
(isLoop > 0) & 5 => 5 // its odd; it should just be 1
(isLoop > 0) & 5 => 6 // its even; it should just be 0
in fact:
0001 (isLoop > 0) AND 0101 (5) is 0001 (1)
0001 (isLoop > 0) AND 0110 (6) is 0000 (0)
Second uncertainty
- Code: Select all
(isLoop > 0) & ((22) % 40) => 2.5
(isLoop > 0) & (22) % 40 => 22
The code looks "the same" (the second one it is just without the brackets), but it outputs very different.
In fact this:
- Code: Select all
output = (isLoop > 0) & (60 + 1) + (isLoop == 0) & ((50 + 1) % 1000)
output 1000 instead of 51 And if I change isLoop to 0, it output 1051
Can you help me to got this? Thanks!