Assembler code improvements campaign
Posted: Tue Oct 21, 2014 9:02 pm
Assembler is great for writing fast DSP code it can do many things that DSP code cannot and enables some great optimizations.
I think if we can get the devs to implement some more opcodes and improvements then the Assembler component can reach its full potential. And with the ability to Write our own functions then we would be on to a real winner.
These improvements will keep us audio/DSP geeks happy and if we get the ability to write our functions for DSP code then we can also extend its abilities for the community.
Here I want to focus on extending the Assembler component with more opcodes. Writing functions is a major wish of mine but it will obviously require a lot more work than adding more opcodes.
So far the wanted/needed opcodes are......
Other fixes improvements...
The long standing ANDNPS syntax colouring bug (all code goes black after this opcode but it works)
...............
Please post any opcodes or improvements you would like to see implemented. Only for Assembler though we can focus on DSP code later in another thread
I think if we can get the devs to implement some more opcodes and improvements then the Assembler component can reach its full potential. And with the ability to Write our own functions then we would be on to a real winner.
These improvements will keep us audio/DSP geeks happy and if we get the ability to write our functions for DSP code then we can also extend its abilities for the community.
Here I want to focus on extending the Assembler component with more opcodes. Writing functions is a major wish of mine but it will obviously require a lot more work than adding more opcodes.
So far the wanted/needed opcodes are......
Code: Select all
PSRLD xmm1, xmm2/m128
Shift doublewords in xmm1 right by amount specified in xmm2/m128 while shifting in 0s.
(Would be handy for some IEE 754 trickey in log and exp approximations)
PMULUDQ xmm1, xmm2/m128
Multiply packed unsigned doubleword integers in xmm1 by packed unsigned doubleword integers in xmm2/m128, and store the quadword results in xmm1.
(Useful for linear congrugential random number generator)
PADDD xmm1, xmm2
Add packed doubleword integers from xmm2/m128 and xmm1.
(Current implementation only supports PADDD xmm1, m128)
SUB reg,reg/var32
Subract integer
PSUBD xmm0,xmm1/m128
Subtract packed integers
Other fixes improvements...
The long standing ANDNPS syntax colouring bug (all code goes black after this opcode but it works)
...............
Please post any opcodes or improvements you would like to see implemented. Only for Assembler though we can focus on DSP code later in another thread
still no luck... No new opcodes, no coloring bugfixes... In fact I think I have found a new one. "sub reg,reg;" is colored as valid opcode, yet it doesn't work.