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Stream Sample and Hold Problem.
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Stream Sample and Hold Problem.
I'm having trouble getting anything out of this stream Sample and Hold module. If anyone could tell me what I'm doing wrong that would be appreciated!
- Attachments
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- Sample and Hold Problem.fsm
- (9.68 KiB) Downloaded 737 times
- Perfect Human Interface
- Posts: 643
- Joined: Sun Mar 10, 2013 7:32 pm
Re: Stream Sample and Hold Problem.
Heya!
Glad I can help.
The 0 crossing s&h need to rise from minus to plus to sample->
Enjoy the linkage
Glad I can help.
The 0 crossing s&h need to rise from minus to plus to sample->
Enjoy the linkage
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nix - Posts: 817
- Joined: Tue Jul 13, 2010 10:51 am
Re: Stream Sample and Hold Problem.
Thanks so much Nix!
Looks like whomever wrote this left out an equals sign.
Now it works in the 0 -> 1 case.
Looks like whomever wrote this left out an equals sign.
Now it works in the 0 -> 1 case.
- Perfect Human Interface
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Re: Stream Sample and Hold Problem.
If you need, here is immediate sample and hold...
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- Hold.fsm
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- Youlean
- Posts: 176
- Joined: Mon Jun 09, 2014 2:49 pm
Re: Stream Sample and Hold Problem.
That's an interesting method Youtlean. You could add a line to make it hold when > 0 rather than just either 0 or 1.
Perhaps this is slightly faster than the above?
Perhaps this is slightly faster than the above?
- Perfect Human Interface
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Re: Stream Sample and Hold Problem.
Here, I took Youlean's code and tweaked it so it accepts stream bool or zero cross. Stream bool is probably the best method overall since you can use them with the stream compare prims.
Edit: Ok so just so it's clear to everyone (now that I realize it myself) this kind of "sample&hold" only holds so long as the bool is true and passes the signal otherwise, while the above module I was originally working with samples when the control value goes from <0 to >0 and holds until the next time it samples. Useful for different things.
Edit: Ok so just so it's clear to everyone (now that I realize it myself) this kind of "sample&hold" only holds so long as the bool is true and passes the signal otherwise, while the above module I was originally working with samples when the control value goes from <0 to >0 and holds until the next time it samples. Useful for different things.
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- Hold_PHI edit.fsm
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- Perfect Human Interface
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- Joined: Sun Mar 10, 2013 7:32 pm
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